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Author: Admin | 2025-04-28
Pass block code;else fail block code; Where : assertion_label : User defined assertion label. assert : SystemVerilog reserve word, used for assertion. expression : Any valid verilog expression. pass block code : Code that gets executed when assertion passes. else : Optional syntax to specify failed code. fail block code : Code that gets executed when assertion fails. Normally we prefer to print some message for pass or fail block code. SystemVerilog provides various assertions levels for reporting messages as listed below. $fatal is a run-time fatal. $error is a run-time error. $warning is a run-time warning, which can be suppressed in a tool-specific manner. $info indicates that the assertion failure carries no specific severity. One can use $display, or any regular verilog code, like triggering a event, or incrementing a counter, or calling function in pass/fail block code. Example - Assert Immediate 1 //+++++++++++++++++++++++++++++++++++++++++++++++++ 2 // DUT With Immediate assertions 3 //+++++++++++++++++++++++++++++++++++++++++++++++++ 4 module assert_immediate(); 5 6 reg clk, grant, request; 7 time current_time; 8 9 initial begin 10 clk = 0; 11 grant = 0; 12 request = 0; 13 #4 request = 1; 14 #4 grant = 1; 15 #4 request = 0; 16 #4 $finish; 17 end 18 19 always #1 clk = ~clk; 20 //================================================= 21 // Assertion used in always block 22 //================================================= 23 always @ (posedge clk) 24 begin 25 if (grant == 1) begin 26 CHECK_REQ_WHEN_GNT : assert (grant && request) begin 27 $display ("Seems to be working as expected"); 28 end else begin 29 current_time = $time; 30 #1 $error("assert failed at time %0t", current_time); 31 end 32 end 33 end 34 35 endmoduleYou could download file assert_immediate.sv here Simulator Output - Assert Immediate Info: "assert_immediate.sv", 21: assert_immediate.CHECK_REQ_WHEN_GNT: at time 9 Seems to be working as expected Info: "assert_immediate.sv", 21: assert_immediate.CHECK_REQ_WHEN_GNT:
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