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Author: Admin | 2025-04-28
11 minutes readIntroductionWith Cisco 8000 routers gaining popularity across various service providers and cloud customers, it’s very important to understand how the system behaves when running labelled transport and services. The reason being the labelled applications are hardware resource intensive, especially on the systems built with single stage forwarding architecture.In this article we will focus on the basic label forwarding transport with & without ECMP along with bundles and look into details on the hardware resource usage. Main focus for this article will be the Encapsulation Database.Also, in this article we will focus on the Silicon One Q100 and Q200 based 8200/8600/8800 systems only. Resource utilizations for the next generation of Silicon One ASICs (e.g P100) are different and we will have another XR docs article focusing on that.Cisco 8000 PIDs with Q100/Q200This table gives the view of current Cisco 8000 products mapping to Q100/Q200Forwarding ASICsCisco 8000 PIDsQ100Standalone: 8201, 8202 , 8800-Line cards: 8800-LC-36FH, 8800-LC-48HQ200Standalone: 8201-24H8FH, 8201-32FH, 8202-32FH-M, Centralized 8608 , 8800-Line cards: 88-LC0-36FH(-M), 88-LC0-36H14FHWhen we compare the forwarding ASICs Q100 & Q200, they are very similar in architecture in terms of hardware components and packet forwarding. But there are differences in terms of the number of 50G SerDes links which brings changes in forwarding throughput between the ASICs.Q100Q200• 10.8 Tbps• 12.8 Tbps• 6 Slices with 216 x 50G SerDes• 6 Slices with 256 x 50G SerDes• 2 x IFG per slice with 18 x 50G SerDes per IFG• 2 x IFG per slice with 16 x 50G (4 IFGs) or 24 x 50G (8 IFGs)• 36MB on-die packet buffer (SMS)• 108MB on-die packet buffer (SMS)• 8GB HBM• 8GB HBMAlso, there are differences in the hardware resources which will bring in scale differences between the two ASICs.Hardware resources at high levelFundamentally, Silicon One ASIC is built with 6 slices where
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