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Author: Admin | 2025-04-28
1.8T 1.8T 3.6T 1.8T 6.4T 6.4T 25.6T 12.8T 12.8T 6.4T No. of Die/Slices 1 Die 2 Slices 1 Die 1 Slices 1 Die 2 Slices 1 Die 1 Slices 1 Dies 4 Slices 2 Dies 4 Slices 1 Die 8 Chiplets 8 Slices 1 Die 4 Chiplets 4 Slices 2 Dies 4 Slices 1 Die 2 Slices Fabrication node 16nm 16nm 16nm 14nm 16nm 14nm 7nm 7nm 7nm 7nm Max Ports (400/200/ 100/50 GE) 0/0/ 18/72 0/0/ 18/72 0/0/ 36/72 0/0/ 18/72 0/0/ 64/0 16/32/ 64/128 64/128/ 256/256 32/64/ 128/128 32/64/ 128/128 16/32/ 64/128 Buffer/Max-per-port (MB) 37.4/18.7 40/40 40/30 40/40 40/10 80/20 120/30 120/60 80/40 40/40 External Deep Buffer N/A N/A N/A N/A N/A N/A N/A N/A 8G HBM N/A Telemetry FT FT, FTE FT, FTE, SSX FT, FTE, SSX SSX FT, FTE, SSX, INT-XD, INT-Transparent FT, FTE, SSX, INT-XD FT, FTE, SSX, INT-XD FT, FTE, SSX, INT-MX, INT-MD, INT-XD FT, FTE, SSX, INT-MX, INT-MD, INT-XD Hardware Entries/Tiles 544K/17 1088K/34 544K/17 1088K/34 352K/11 1088K/34 640K/20 1280K/40 1280K/40 1280K/40 Classification TCAM (Ingress/ Egress) Per Slice 4K/2K 5K/2K 5K/2K 5K/2K 4K/2K 5K/2K 6K/3K 6K/3K 14K Shared 14K Shared CloudScale ASIC Classification TCAM Architecture CloudScale ASIC Ingress Forwarding Controller The ingress forwarding controller operates as follows: when a packet is received from the MAC layer, it parses the packet headers and conducts several lookups to determine whether the packet should be accepted and how it should be forwarded to its intended destination. Additionally, the controller generates instructions for the data path to handle the storage and queuing of the packet. For a visual representation of this process, see Figure 1, showcasing the CloudScale ASIC ingress forwarding controller. Figure 1 Cisco Could Scale ASIC ingress forwarding controller After forwarding lookups, the packet undergoes ingress classification processing. The ingress matches are verified against the classification
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