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Author: Admin | 2025-04-28
| metal1 |via2 )Types and the direction of the metalPitchWidthSpacing Resistance (per square unit)The technology file used by the Cadence tool is .techlef format and .tf format by Synopsys tool. RC coefficient file: TLU file is a short form of “Table Look-Up” used for RC estimation and extraction or we use QRC file or cap table for the same.MMMC view file: Multi-Mode Multi-Corner file is used to generate different analysis views based on different delay corners and constraints modes. Delay corners are defined on library sets and RC corners. There are various library set files based on voltage and temperature values (like ss, ff, typical). The above set of files is needed to initiate all the physical designs. Some files format is different for the Cadence tool and Synopsys tool. There are some optional files that might be required especially for block-level PnR implementation. These files are as below.Block partition: For block-level PnR, we need a defined core area for the block or block partitions which defines the size and shape of the block. Block shape could be a simple rectangular or a complex rectilinear shape.Pin def: For block-level PnR, pin locations have been decided by the Full chip owner and for block-level, we have to use the predecided pin location in order to match the pin locations with other blocks. Generally, it is given in form of a def file. In case of any pin placement issue at the block level, the block owner can inform the person who is placing the pin and if required block owner can also edit the pin placement.Power plan script: For block-level PnR, the power plan should be as per the full chip. The power plan has been decided on full chip and in block level, the Power plan should be used as per full chip. A power plan could be given a set of rules or a power plan script (.tcl file).Power intent (UPF | CPF file): The power intent file describes which power rails should be routed to individual blocks and when the block should be powered on or shut down. Unified Power Format (.upf) and Common Power Format (.cpf) are two different formats of power intent files. CPF format is used by the Cadence tool and UPF format by the other tools. We must need this file if the block is having a multi-voltage domain.Switching activity files (VCD | SAIF): SAIF or VCD file is used basically for the dynamic IR analysis in the Physical design. Dynamic IR analysis provides the Dynamic power drop inside the chip based on the switching activities. Note: All the files described here are very brief, for more details about these files please refer to the “Files in VLSI” section of the blog or our YouTube channel.Thank you!
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