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Author: Admin | 2025-04-28
Product Description The SHA2-B209 is a crypto IP Core for hardware offloading of Hash algorithms.The engine implements the Secure Hash Algorithm 2 (SHA-2) family according to FIPS 180-4 standard. It includes SHA-224, SHA-256, SHA-384, and SHA 512 functions, and the truncated variants SHA-512/224 and SHA-512/256.SHA2-B209 supports HMAC (Keyed-Hash Message Authenticated Code) and HKDF (HMAC-based Key Derivation Function) operations, being possible to use any of the hash primitives as underlying function. Key Features and Benefits Portable to any FPGA or ASIC Cryptographic Hashing: SHA-224, SHA-256, SHA-384, SHA-512, SHA-512/224, SHA-512/256 HMAC, HKDF Support AMBA AXI Interfaces RFC 5869 Compliant FIPS 198-1, RFC 2104 Compliant FIPS 180-4, FIPS 140-3 Compliant Featured Documents SHA2-B209 Datasheet SHA2-B209 Web Site Device Implementation Matrix Device utilization metrics for example implementations of this core. Contact provider for more information. Family Device Speed Grade Tool Version HW Validated? Slice LUT BRAM DSP48 CMT GTx FMAX (Mhz) VIRTEX-UP Family XCVU5P -2 Vivado ML 2021.2 574 3302 2 0 0 0 335 Kintex-UP Family XCKU5P -1 Vivado 2018.2 557 3245 2 0 0 0 290 Zynq-UP-MPSoC Family XCZU2CG -1 Vivado 2018.2 527 3244 2 0 0 0 290 Spartan-7 Family XC7S50 -2 Vivado 2018.2 978 3309 2 0 0 0 135 VERSAL_AI_CORE Family XCVC1802 -1 Vivado ML 2021.2 604 3308 2 0 0 0 270 Artix-UP Family XCAU20P -2 Vivado ML 2021.2 545 3304 2 0 0 0 340 KINTEX-7 Family XC7K70T -1 Vivado 2018.2 965 3264 2 0 0 0 180 ARTIX-7 Family XC7A50T -2 Vivado 2018.2 978 3309 2
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