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Author: Admin | 2025-04-28
Function for the RISC-V architecture. The underlying Boolean functions for the S-box layer are improved and efficiently implemented on RISC-V platform. The implementation results demonstrate a notable speed increase of 29% compared to reference implementations.3 Ascon: lightweight cipherWe detail the Ascon parameters in Sect. 3.1. Following that, we delve into the internal architecture of Ascon for AE in Sect. 3.2. Lastly, we explore the Ascon permutation function in Sect. 3.3.3.1 Supported parametersAscon is based on a duplex mode of operation that is identical to MonkeyDuplex [20]. However, Ascon consists of keyed initialization and finalization functions that are much stronger. To achieve compact hardware implementation, the design parameters (state size, rate, capacity, key length) and operating modes (Ascon-128 and Ascon-128a) are diligently selected. The two operating modes of Ascon and their recommended design parameters length are listed in Table 3. Ascon-128 (primary recommendation) and Ascon-128a (secondary recommendation) are ideal for lightweight use cases in IoT environments.Table 3 Design parameter length for Ascon-128 and Ascon-128aFull size table3.2 Ascon internal architectureThe internal architecture of Ascon AE is shown in Fig. 1. Both operating modes of Ascon are executed on a 320-bit state represented by S. The state update is performed in four stages: initialization; processing of AD; processing of PT/CT; and finalization. In both initialization and finalization stages, the permutation function f is employed 12 times while the same permutation function is employed six times in processing AD and PT/CT. The 320-bit state is split into outer (\(S_r\)) and inner parts (\(S_c\)), where
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