Arnaud picqué

Comment

Author: Admin | 2025-04-28

1416–1417 (2003)Article Google Scholar E. Rodriguez-Villegas, M. Jimenez, R.G. Carvajal, On dealing with the charge trapped in floating-gate MOS (FGMOS) transistors. IEEE Trans. Circuits Syst. II Express Briefs 54(2), 156–160 (2007)Article Google Scholar E. Rodriguez-Villegas, Low Power and Low Voltage Circuit Design with the FGMOS Transistor (Institution of Engineering and Technology, Stevenage, 2006)Book Google Scholar L. Zuo, S.K. Islam, Low-voltage bulk-driven operational amplifier with improved transconductance. IEEE Trans. Circuits Syst. Regul. Pap. 60(8), 2084–2091 (2013)Article Google Scholar J.M. Carrillo, G. Torelli, R.P.-A. Valverde, J.F. Duque-Carrillo, 1-V rail-to-rail CMOS OpAmp with improved bulk-driven input stage. IEEE J. Solid-State Circuits 42(3), 508–517 (2007)Article Google Scholar J.M. Carrillo, G. Torelli, J.F. Duque-Carrillo, Transconductance enhancement in bulk-driven input stages and its applications. Analog Integr. Circuits Signal Process. 68(2), 207–217 (2011)Article Google Scholar J.M. Carrillo, G. Torelli, M.A. Domínguez, J.F. Duque-Carrillo, On the input common-mode voltage range of CMOS bulk-driven input stages. Int. J. Circuit Theory Appl. 39(6), 649–664 (2011)Article Google Scholar P. Kinget, M. Steyaert, J. van der Spiegel, Full analog CMOS integration of very large time constants for synaptic transfer in neural networks. Analog Integr. Circuits Signal Process. 2(4), 281–295 (1992)Article Google Scholar A. Arnaud, R. Fiorelli, and C. Galup-Montoro, On the design of very small transconductance otas with reduced input offset, in 2005 18th Symposium on Integrated Circuits and Systems Design (2005), pp. 15–20 Google Scholar C. Galup-Montoro, M.C. Schneider, I.J.B. Loss, Series-parallel association of FET’s for high gain and high frequency applications. IEEE J. Solid-State Circuits 29(9), 1094–1101 (1994)Article Google Scholar M. Steyaert, P. Kinget, W. Sansen, Full integration of extremely large time constants in CMOS. Electron. Lett. 27(10), 790–791 (1991)Article Google Scholar A. Arnaud, C. Galup-Montoro, Pico-A/V range CMOS transconductors using series-parallel current division. Electron. Lett. 39(18), 1295–1296 (2003)Article Google Scholar A. Arnaud, R. Fiorelli, C. Galup-Montoro, Nanowatt, Sub-nS OTAs, with Sub-10-mV input offset, using series-parallel current mirrors. IEEE J. Solid-State Circuits 41(9), 2009–2018 (2006)Article Google Scholar R. Fiorelli, A. Arnaud, C. Galup-Montoro, Series-parallel association of transistors for the reduction of random offset in non-unity gain current mirrors, in Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Add Comment